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Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator

Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator

António Canelas, Ricardo Martins, Ricardo Póvoa, Nuno Lourenço, Jorge Guilherme, Nuno Horta
Copyright: © 2015 |Pages: 32
ISBN13: 9781466666276|ISBN10: 1466666277|EISBN13: 9781466666283
DOI: 10.4018/978-1-4666-6627-6.ch005
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MLA

Canelas, António, et al. "Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator." Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, edited by Mourad Fakhfakh, et al., IGI Global, 2015, pp. 102-133. https://doi.org/10.4018/978-1-4666-6627-6.ch005

APA

Canelas, A., Martins, R., Póvoa, R., Lourenço, N., Guilherme, J., & Horta, N. (2015). Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator. In M. Fakhfakh, E. Tlelo-Cuautle, & M. Fino (Eds.), Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design (pp. 102-133). IGI Global. https://doi.org/10.4018/978-1-4666-6627-6.ch005

Chicago

Canelas, António, et al. "Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator." In Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, edited by Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Maria Helena Fino, 102-133. Hershey, PA: IGI Global, 2015. https://doi.org/10.4018/978-1-4666-6627-6.ch005

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Abstract

This chapter presents a new methodology to enhance the optimization process of an analog integrated circuit synthesis tool, AIDA-C, by taking into account the floorplan of the circuit. The addition of the new Analog Module Generator (AMG) in the AIDA framework creates the possibility to efficiently explore the circuit floorplan during the optimization process and to improve the quality of the final floorplan by adding complex device structures enhancing the layout matching, symmetry, and routing, reducing some of the non-idealities to which analog integrated circuits are so sensitive. The performance enhancement attained with AMG is demonstrated using a well-known benchmark circuit, optimized by AIDA-C with and without taking into account AMG's complex structures in the evaluation of the circuit's floorplan.

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