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SVM-Based Switching Filter Hardware Design for Mixed Noise Reduction in Digital Images Using High-Level Synthesis Tools

SVM-Based Switching Filter Hardware Design for Mixed Noise Reduction in Digital Images Using High-Level Synthesis Tools

Abdulhadi Mohammad din Dawrayn, Muhammad Bilal
Copyright: © 2022 |Volume: 12 |Issue: 1 |Pages: 16
ISSN: 2155-6997|EISSN: 2155-6989|EISBN13: 9781683182122|DOI: 10.4018/IJCVIP.2022010106
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MLA

Dawrayn, Abdulhadi Mohammad din, and Muhammad Bilal. "SVM-Based Switching Filter Hardware Design for Mixed Noise Reduction in Digital Images Using High-Level Synthesis Tools." IJCVIP vol.12, no.1 2022: pp.1-16. http://doi.org/10.4018/IJCVIP.2022010106

APA

Dawrayn, A. M. & Bilal, M. (2022). SVM-Based Switching Filter Hardware Design for Mixed Noise Reduction in Digital Images Using High-Level Synthesis Tools. International Journal of Computer Vision and Image Processing (IJCVIP), 12(1), 1-16. http://doi.org/10.4018/IJCVIP.2022010106

Chicago

Dawrayn, Abdulhadi Mohammad din, and Muhammad Bilal. "SVM-Based Switching Filter Hardware Design for Mixed Noise Reduction in Digital Images Using High-Level Synthesis Tools," International Journal of Computer Vision and Image Processing (IJCVIP) 12, no.1: 1-16. http://doi.org/10.4018/IJCVIP.2022010106

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Abstract

Impulse and Gaussian are the two most common types of noise that affect digital images due to imperfections in the imaging process, compression, storage and communication. The conventional filtering approaches, however, reduce the image quality in terms of sharpness and resolution while suppressing the effects of noise. In this work, a machine learning-based filtering structure has been proposed preserves the image quality while effectively removing the noise. Specifically, a support vector machine classifier is employed to detect the type of noise affecting each pixel to select an appropriate filter. The choice of filters includes Median and Bilateral filters of different kernel sizes. The classifier is trained using example images with known noise parameters. The proposed filtering structure has been shown to perform better than the conventional approaches in terms of image quality metrics. Moreover, the design has been implemented as a hardware accelerator on an FPGA device using high-level synthesis tools.